/* $Header: i_op.h,v 2.2 01/10/02 10:30:25 przybyls Exp $ */

/***********************************************************************/
/* INCLUDE FILE NAME:   i_op.h                                         */
/* ==================                                                  */
/*                                                                     */
/* Author: rick                                                        */
/*                                                                     */
/* COMMENT: assembler defines for general purpose use                  */
/*                                                                     */
/*                                                                     */
/*                                                                     */
/*                                                                     */
/***********************************************************************/

#ifndef I_OP_H
#define I_OP_H


/*****************************/
/*   IFDEFS                  */
/*****************************/


/*****************************/
/*   SYMBOLIC CONSTANTS      */
/*****************************/


/*****************************/
/*   TYPEDEFS                */
/*****************************/


/*****************************/
/*   MACROS                  */
/*****************************/

#if defined mccabe
#define  INTERRUPTS_OFF
#define  INTERRUPTS_ON
#else
#define  INTERRUPTS_OFF  __asm("\txref SaveIaddress\n\txref _I_Cnt\n\taddq.b #1,_I_Cnt\n\tjsr SaveIaddress\n\tmove.w  sr,-(sp)\n\tor.w    #$0700,sr");
#define  INTERRUPTS_ON   __asm("\txref _I_Cnt\n\tsubq.b #1,_I_Cnt\n\tmove.w  (sp)+,sr");
#endif

#define  WAIT_FOR_512_TO_DROP                              \
    /* wait for the beginning of a 512 clock cycle */      \
    /* wait for the level to rise */                       \
    while (( *(volatile BIT16 * )PWMC & 0x02 ) == 0 ){};   \
    /* wait for the level to drop */                       \
    while (( *(volatile BIT16 * )PWMC & 0x02 ) != 0 ){};   \

#define  WAIT_FOR_512_TO_RISE                              \
    /* wait for the beginning of a 512 clock cycle */      \
    /* wait for the level to fall */                       \
    while (( *(volatile BIT16 * )PWMC & 0x02 ) != 0 ){};   \
    /* wait for the level to rise */                       \
    while (( *(volatile BIT16 * )PWMC & 0x02 ) == 0 ){};   \


#define DISABLE_START_RUN_INTERRUPT                                 \
          INTERRUPTS_OFF                                            \
          /* disable start run interrupt  DSP_BOOT(bit1) = 1 */ \
          Detector_Adc_Image |= 0x02;                               \
          DSP_BOOT = Detector_Adc_Image;                        \
          INTERRUPTS_ON


#define ENABLE_START_RUN_INTERRUPT                                  \
          INTERRUPTS_OFF                                            \
          /* enable start run interrupt: DSP_BOOT(bit1) = 0 */  \
          Detector_Adc_Image &= 0xfd;                               \
          DSP_BOOT = Detector_Adc_Image;                        \
          INTERRUPTS_ON


/* the signal DSP samples this input at 16 kHz, so there must be at least 62.5 usec between transitions */
#define SEND_START_TO_SIG_DSP                                       \
          INTERRUPTS_OFF                                            \
          /* set signal DSP start: DSP_BOOT(bit0) = 1 */        \
          Detector_Adc_Image |= 0x01;                               \
          DSP_BOOT = Detector_Adc_Image;                        \
          INTERRUPTS_ON


/* the signal DSP samples this input at 16 kHz, so there must be at least 62.5 usec between transitions */
#define RESET_START_TO_SIG_DSP                                      \
          INTERRUPTS_OFF                                            \
          /* reset signal DSP start: DSP_BOOT(bit0) = 0 */      \
          Detector_Adc_Image &= 0xfe;                               \
          DSP_BOOT = Detector_Adc_Image;                        \
          INTERRUPTS_ON


#define SEND_RETRY_REQUEST_TO_SIG_DSP                      \
          INTERRUPTS_OFF                                   \
          Detector_Adc_Image |= 0x04;                      \
          DSP_BOOT = Detector_Adc_Image;               \
          INTERRUPTS_ON


#define RESET_SIG_DSP_RETRY_REQUEST                        \
          INTERRUPTS_OFF                                   \
          Detector_Adc_Image &= 0x0b;                      \
          DSP_BOOT = Detector_Adc_Image;               \
          INTERRUPTS_ON




                                   /* FFFA27 is the SWSR register (see regs.h) */
#define FEED_THE_WATCHDOG  __asm("\tmove.b  #$55,$FFFA27\n\tmove.b  #$AA,$FFFA27");


/*****************************/
/*   FUNCTION PROTOTYPES     */
/*****************************/

#pragma SECTION PROG=boot

void InitializeInterrupts (void);

#pragma SECTION UNDO


#pragma SECTION PROG=SysCode

void InitResource (pRESOURCE Resource);
void LockResource (pRESOURCE Resource);
void ReleaseResource (pRESOURCE Resource);
BIT8 IsrLockResource (pRESOURCE Resource);

#pragma SECTION UNDO

#endif
